PAGE TITLE
Overview
PAGE SUMMARY
Through silicon via (TSV) based 3-D integrated circuits (IC) permit the integration of heterogeneous technologies with CMOS. The integrated system may include RF, analog, micro/nano-electromechanical systems (MEMS/NEMS) as well as emerging technologies such as nano-FET and graphene-based device planes. The design and fabrication of these disparate device planes may take place at separate facilities. Unless technology specific information on each device plane is provided, the packaging facility carrying out the final 3-D integration of the device planes is unaware of the power supply voltage requirements of the different ICs.
Drexel researchers have developed a circuit technique to detect the power supply voltage requirement of each voltage domain in each device plane of the 3-D IC stack. The circuit consists of 1) a ring oscillator in each voltage domain located in each device plane, and 2) a power module placed in a dedicated power plane. Two different circuit implementations of the power module have been developed which provide a precise reference voltage to on-chip voltage regulators (LDO or DC-DC switching buck converter). The power module supports DVFS and can provide the desired power supply voltage for advanced CMOS technology nodes (45 nm and beyond) in less than 100 ns. The voltage detection circuit also clamps the voltage to the desired level thus providing an elegant solution to power supply voltage variations due to PVT.
APPLICATIONS
TITLE: Applications
IC power supply voltage detection and clamping.
Nullify IC power supply voltage variation due to PVT and ageing.
Plug-and –Play heterogeneous 3-D IC integration
ADVANTAGES
TITLE:Advantages
Fast response time
High precision in detecting and setting power supply voltage for deep submicron CMOS technologies
Minimal area and power overhead to integrate in existing CMOS designs
FIGURES: Insert Figure Image Inside Figure Tags within Editor
Figure 1
IP STATUS
Intellectual Property and Development Status
United States Patent Pending- 15/096,046
http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PG01&p=1&u=/netahtml/PTO/srchnum.html&r=1&f=G&l=50&s1=20160301400.PGNR.&OS=DN/20160301400&RS=DN/20160301400
PUBLICATIONS
References
Pubinfo should be the citation for your publication. Publink is the full url linking to the publication online or a pdf.
D. Pathak and I. Savidis, “Run-Time Voltage Detection Circuit for 3-D IC Power Delivery,” Proceedings of the IEEE 27th International SoC Conference (SoCC), pp. 229-233, September 2014
http://ieeexplore.ieee.org/document/6948923/
D. Pathak and I. Savidis, “Power Supply Voltage Detection and Clamping Circuit for 3-D Integrated Circuit,” Proceedings of the IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, pp. 94-96, October 2014.
http://ieeexplore.ieee.org/document/7028202/
Multimedia Link
http://ice.ece.drexel.edu
Commercialization Opportunities
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Contact Information
Ravi Raghani, Ph.D.
Licensing Manager
Office of Applied Innovation
Drexel University
215-895-0303
rmr359@drexel.edu
For Technical Information:
Ioannis Savidis, PhD
Assistant Professor
Department of Electrical and Computer Engineering
3120-40 Market Street, Bossone 610
Philadelphia, PA 19104-2875
Phone: +1-215-571-4584
Email: isavidis@coe.drexel.edu